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Intelligent Temperature Collecting Controller Based on
At present, based on intelligent temperature sensor DS18B20 temperature measurement design mostly SCM program. This topic attempts to use FPGA chip design. FPGA has a wide range of flip-flops and I / O pins, while static repeatable programming and dynamic in the system reconstruction features, greatly improving the design flexibility and versatility, more suitable for the development of electronic systems. If the user demand is very large, the use of ASIC chips can greatly save costs, economic benefits are very significant. FPGA can do other full custom or semi-custom ASIC circuit test sample. In view of this, this topic uses the hardware description language design FPGA controller to realize the sensor control, simultaneously uses the VC to realize the user control the interface.
The presence of l-wire sensors (such as the DS18B20) allows for improved network cabling, such as warehouses, factories, buildings, etc. that require real-time temperature measurement. In the construction of mass concrete, in order to prevent the cracking of concrete caused by the failure of the project, the need for a number of points in real-time monitoring of the temperature. Due to the limitations of the construction site, the wiring area available is as simple as possible. At the same time, the scene temperature collection and control also have certain requirements. Then you can in the required temperature measurement point horizontal or vertical constitute a multi-layer network, and each line bus sensor can be directly attached to the above. And for each layer of temperature acquisition and control can be "FPGA controller" to achieve, use and disassembly are very convenient. And because FPGA portability is good, easy to upgrade, for the cost of each enterprise can be greatly reduced. With the further development of FPGA, the temperature acquisition controller will continue to expand the scope of application, the value will be reflected more and more high.
Field Programmable Gate Array (FPGA) is the most widely used class of programmable ASICs (ASICs). FPGA as a special integrated circuit (ASIC) in the field of a semi-custom circuit and appears, both to solve the problem of custom circuits, but also to overcome the limited number of existing programmable device gate circuit shortcomings. Electronic design engineers can use it to design the required ASICs in the office or in the lab, greatly reducing time-to-market and reducing development costs. In addition, programmable logic devices also feature static repeatable programming and dynamic refactoring in the system. This allows the functionality of the hardware to be modified as programming by software, greatly improving the flexibility and versatility of the electronic system design.
Design of Intelligent Temperature Collector
There are two general approaches to FPGA design: top-down and bottom-up. Any complex digital system, can be broken down by level, has been assigned to each part has a relatively clear and simple design so far. This is often the way to divide and rule. Top-down approach is important, that is only in the above level to fully determine the following module input and output and functional behavior specifications. And sometimes the bottom line is also feasible because some of the specifications of the module itself is determined in advance or basically can be determined.
In view of the characteristics of the temperature acquisition controller system, it is decided to adopt the top-down design method, and the whole system is divided into Control Unit and Data Path to design (Figure 1). (1) Control Unit under the control of the internal FSM, in each State will have Outputs, control Data Path data transmission, to meet the DS18B20 timing requirements; (2) Data Path is completed all the (3) If you want to add additional control flow and data flow to be added to the entire FPGA system, as long as the Control Unit in the change, so that the control unit can be changed in the Control Unit. The corresponding State and Data Path can be modified accordingly. This design of the system stability, good scalability.